The 24C16 is a 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM made by Fairchild Semiconductor, supplied in these packages: DIP, SO, TSSOP 8 Pin Type. The absolute maximum ratings table on this page lists the 6 limits from the manufacturer's datasheet that must not be exceeded. This page brings together the 24C16 pinout and maximum ratings, with the full datasheet PDF to preview below or download.
The 24C16, 24C17 devices are 16,384 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements.
The upper half (upper 8Kbit) of the memory of the NM24C17 can be write protected by connecting the WP pin to VCC. This section of memory then becomes unalterable unless WP is switched to VSS. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s).
The Standard IIC protocol allows for a maximum of 16K of EEPROM memory which is supported by the Fairchild family in 2K, 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs. In order to implement higher EEPROM memory densities on the IIC bus, the Extended IIC protocol must be used. (Refer to the NM24C32 or NM24C65 datasheets for more information.)
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