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25Q64FV Datasheet – 64M-bit Serial Flash memory (W25Q64FV)

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Package DIP, SOIC 8Pin Type

25Q64FV overview

The W25Q64FV (64M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving packages.

The W25Q64FV array is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q64FV has 2,048 erasable sectors and 128 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.)

The W25Q64FV support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2- clocks instruction cycle Quad Peripheral Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O and QPI instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation.

A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification, a 64-bit Unique Serial Number and three 256-bytes Security Registers.

Part Number25Q64FV, W25Q64FV
Function64M-bit Serial Flash memory
PackageDIP, SOIC 8Pin Type
ManufacturerWinbond
DatasheetDownload PDF AM5890S pdf

Datasheet

25q64fv-datasheet.pdf
Format PDFSize 1.8 MBLanguage ENRevision Rev. S
Third-party / unverified source

25Q64FV features

  • Family of SpiFlash Memories
  • – W25Q64FV: 64M-bit / 8M-byte (8,388,608)
  • Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
  • Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold
  • Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3
  • QPI: CLK, /CS, IO0, IO1, IO2, IO3
  • Highest Performance Serial Flash
  • 104MHz Standard/Dual/Quad SPI clocks
  • 208/416MHz equivalent Dual/Quad SPI
  • 50MB/S continuous data transfer rate
  • More than 20-year data retention
  • More than 100,000 erase/program cycles
  • Efficient “Continuous Read” and QPI Mode
  • Continuous Read with 8/16/32/64-Byte Wrap
  • As few as 8 clocks to address memory
  • Quad Peripheral Interface (QPI) reduces instruction overhead
  • Allows true XIP (execute in place) operation
  • Outperforms X16 Parallel Flash
  • Low Power, Wide Temperature Range Single 2.7 to 3.6V supply 4mA active current, <1µA Power-down (typ.) -40°C to +85°C operating range
  • Single 2.7 to 3.6V supply
  • 4mA active current, <1µA Power-down (typ.)
  • -40°C to +85°C operating range
  • Flexible Architecture with 4KB sectors
  • Uniform Sector Erase (4K-bytes)
  • Uniform Block Erase (32K and 64K-bytes)
  • Program 1 to 256 byte per programmable page
  • Erase/Program Suspend & Resume
  • Advanced Security Features
  • Software and Hardware Write-Protect
  • Top/Bottom, 4KB complement array protection
  • Power Supply Lock-Down and OTP protection
  • 64-Bit Unique ID for each device
  • Discoverable Parameters (SFDP) Register
  • 3X256-Bytes Security Registers with OTP locks
  • Volatile & Non-volatile Status Register Bits
  • Space Efficient Packaging
  • 8-pin SOIC/VSOP 208-mil
  • 8-pad WSON 6x5-mm/8x6-mm
  • 8-pad XSON 4x4-mm
  • 16-pin SOIC 300-mil

25Q64FV pinout

25Q64FV pinout diagram

Absolute maximum ratings

ParameterSymbolValueUnitConditions
Supply VoltageVCC–0.6 to 4.6VV
Voltage Applied to Any PinVIO–0.6 to VCC+0.4VRelative to Ground
Transient Voltage on any PinVIOT–2.0V to VCC+2.0VV<20nS Transient Relative to Ground
Storage TemperatureTSTG–65 to +150°C
Electrostatic Discharge VoltageVESD(3)–2000 to +2000VHuman Body Model

25Q64FV applications

  • Industrial Automation
  • Networking Equipment
  • Automotive Electronics
  • IoT Devices

More about 25Q64FV

25Q64FV Features

  • Family of SpiFlash Memories
  • Highest Performance Serial Flash
  • Efficient “Continuous Read” and QPI Mode
  • Low Power, Wide Temperature Range
  • Flexible Architecture with 4KB sectors
  • Advanced Security Features
  • Space Efficient Packaging

25Q64FV Absolute Maximum Ratings

PARAMETERSSYMBOLCONDITIONSRANGEUNIT
Lead TemperatureTLEAD See Note°C
Notes:
  1. This device has been designed and tested for the specified operation ranges. Proper operation outside of these levels is not guaranteed. Exposure to absolute maximum ratings may affect device reliability. Exposure beyond absolute maximum ratings may cause permanent damage.
  2. JEDEC Std JESD22-A114A (C1=100pF, R1=1500 ohms, R2=500 ohms).
  3. Compliant with JEDEC Standard J-STD-20C for small body Sn-Pb or Pb-free (Green) assembly and the European directive on restrictions on hazardous substances (RoHS) 2002/95/EU.

SOIC/VSOP 208-mil, WSON 6x5/8x6-mm, XSON 4x4-mm and PDIP 300-mil

PIN NO.PIN NAMEI/OFUNCTION
1/CSIChip Select Input
2DO (IO1)I/OData Output (Data Input Output 1)*1
3/WP (IO2)I/OWrite Protect Input ( Data Input Output 2)*2
4GND Ground
5DI (IO0)I/OData Input (Data Input Output 0)*1
6CLKISerial Clock Input
7/HOLD (IO3)I/OHold Input (Data Input Output 3)*2
8VCC Power Supply

*1 IO0 and IO1 are used for Standard and Dual SPI instructions *2 IO0 – IO3 are used for Quad SPI instructions

SOIC 300-mil

PIN NO.PIN NAMEI/OFUNCTION
1/HOLD (IO3)I/OHold Input (Data Input Output 3)*2
2VCC Power Supply
3N/C No Connect
4N/C No Connect
5N/C No Connect
6N/C No Connect
7/CSIChip Select Input
8DO (IO1)I/OData Output (Data Input Output 1)*1
9/WP (IO2)I/OWrite Protect Input (Data Input Output 2)*2
10GND Ground
11N/C No Connect
12N/C No Connect
13N/C No Connect
14N/C No Connect
15DI (IO0)I/OData Input (Data Input Output 0)*1
16CLKISerial Clock Input

*1 IO0 and IO1 are used for Standard and Dual SPI instructions *2 IO0 – IO3 are used for Quad SPI instructions

TFBGA 8x6-mm

BALL NO.PIN NAMEI/OFUNCTION
B2CLKISerial Clock Input
B3GND Ground
B4VCC Power Supply
C2/CSIChip Select Input
C4/WP (IO2)I/OWrite Protect Input (Data Input Output 2)*2
D2DO (IO1)I/OData Output (Data Input Output 1)*1
D3DI (IO0)I/OData Input (Data Input Output 0)*1
D4/HOLD (IO3)I/OHold Input (Data Input Output 3)*2
MultipleNC No Connect

*1 IO0 and IO1 are used for Standard and Dual SPI instructions

*2 IO0 – IO3 are used for Quad SPI instructions

WLCSP

BALL NO.PIN NAMEI/OFUNCTION
A2VCC Power Supply
B2/HOLD (IO3)I/OHold Input (Data Input Output 3)*2
C2CLKISerial Clock Input
D2DI (IO0)I/OData Input (Data Input Output 0)(1)
A3/CSIChip Select Input
B3DO (IO1)I/OData Output (Data Input Output 1)(1)
C3/WP (IO2)I/OWrite Protect Input (Data Input Output 2)(2)
D3GND Ground
MultipleNC No Connect

Notes:

  1. IO0 and IO1 are used for Standard and Dual SPI instructions

25Q64FV datasheet PDF preview

PDF · 1.8 MB

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