NT6861 is a monitor component mC for auto-sync and digital controlled applications. it contains a 6502 8-bit CPU core, 256 bytes of RAM used as working RAM and stack area, 24K bytes of ROM maximum for programming, 14-channel 8-bit PWM D/A converters, 2- channel A/D converters for key detection saving I/O pins, one 8 bit pre-loadable base timer, internal Hsync and Vsync signals processor providing mode detection, watch-dog timer preventing system from abnormal operation, and an I2C bus interface.
Users can store EDID data in the 128 bytes of RAM for DDC1/2B, so that users can save the cost of dedicated EEPROM for EDID. Half frequency output function can save external one-shot circuit. All of these designs create savings in component costs.
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