74LS109 Dual J-K Positive Edge-triggered Flip-Flop
Package SOIC Series 74LS
74LS109 overview
The 74LS series of integrated circuits (ICs) was one of the most popular logic families of transistor-transistor logic (TTL) logic chips. 74LS series is a bipolar, low-power Schottky IC. 74LS109 contains two independent J-K positive edge-triggered flip-flops. A low level at the preset or clear inputs set or reset the outputs regardless of the levels of the other inputs.
Key specifications
Supply Voltage
4.75 - 5.25Vdc
Maximum Clock Frequency
40Mhz
Power Dissipation
2mW/gate @100kHz
Minimum Output Current
8mA
Propagation Delay
10nS
Fan Out (TTL Loads)
20
Datasheet
109.pdf
74LS109 features
- Two Independent JK Positive Edge Triggered Flip-Flops
- Separate Preset and Clear Inputs
- Fast Switching Times
- Operating Temperature up to 70°C
- Standard TTL Switching Voltages
74LS109 pinout
| Pin | Name | Description |
|---|---|---|
| 1 | CD | Digital Clock |
| 2 | J1 | Data Input J1 |
| 3 | K1 | Data Input K1 |
| 4 | CP | Clear Pin/Clock Pin |
| 5 | SD | Serial Data Pin |
| 6 | Q1 | Active High Output Q1 |
| 7 | Q1' | Active Low Output Q1' |
| 8 | GND | Ground |
| 9 | Q2 | Active High Output Q2 |
| 10 | Q2' | Active Low Output Q2' |
| 11 | SD | Serial Data Pin |
| 12 | CP | Clear Pin/Clock Pin |
| 13 | K2 | Data Input K2 |
| 14 | J2 | Data Input J2 |
| 15 | CD | Digital Clock Pin |
| 16 | VCC | Positive Supply |
74LS109 applications
- Event Detectors
- Data Synchronizers
- Frequency Divider
More about 74LS109
74LS109 Alternative Equivalent
74LS107, 74LS112
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