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74LS74 Dual D-Type Flip-Flop

Published Updated 5,161 views
Package PDIP, SOIC Series 74LS
74LS74 Dual D-Type-Flip-Flop-IC-Datasheet

74LS74 overview

The 74LS series of integrated circuits (ICs) was one of the most popular logic families of transistor-transistor logic (TTL) logic chips. 74LS series is a bipolar, low-power Schottky IC. 74LS74 Dual D-Type Flip-Flop contains two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs.

Key specifications

Supply Voltage
4.75 - 5.25Vdc
Maximum Clock Frequency
40Mhz
Power Dissipation
2mW/gate @100kHz
Minimum Output Current
8mA
Propagation Delay
10nS
Fan Out (TTL Loads)
20

Datasheet

74.pdf
Format PDFSize 54 KBLanguage EN
Third-party / unverified source

74LS74 features

  • Two Independent Negative Edge Triggered JK Flip-Flops
  • Standard Pin Arrangement
  • Fast Switching Times
  • Operating Temperature up to 70°C
  • Standard TTL Switching Voltages

74LS74 pinout

74LS74 pinout diagram
PinNameDescription
1CDClock Pin
2DD Flip Flop Pin
3CPClear Pin
4SDSerial Data Pin
5Q1The output logic level Q1
6Q1'The output logic level Q1'
7GNDGround
8Q2'The output logic level Q2'
9Q2The output logic level Q2'
10SDSerial Data Pin
11CPClear Pin
12DD Flip Flop Pin
13CDClock Pin
14VCCPositive Supply

74LS74 applications

  • Create delay-lines

More about 74LS74

74LS74 Alternative Equivalent

74LS273, 74LS373

74LS74 datasheet PDF preview

PDF · 54 KB

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