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CD4052 Differential 4-channel Multiplexer/Demultiplexer

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Package SOIC, SOP, PDIP Series CD4000 (CMOS)
CD4052 Differential 4-channel Multiplexer-Demultiplexer-IC-Datasheet

CD4052 overview

CD4052 belongs to the 4000 Series CMOS Logic Family of Integrated Circuits (IC's) constructed with N- and P-channel enhancement mode transistors. CD4052 has a Differential 4-channel Multiplexer/Demultiplexer

CD4052 has a supply voltage range of 5V to 20V, which is much higher than any contemporary logic family. It has buffered output which improves transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS.

Datasheet

cd4052.pdf
Format PDFSize 142 KBLanguage EN
Third-party / unverified source

CD4052 features

  • Wide range of digital and analog signal levels:digital 3 – 15V, analog to 15Vp-p
  • digital 3 – 15V, analog to 15Vp-p
  • Low “ON” resistance: 80Ω (typ.) over entire 15Vp-psignal-input range for VDD − VEE = 15V
  • signal-input range for VDD − VEE = 15V
  • High “OFF” resistance:channel leakage of ±10 pA (typ.) at VDD − VEE = 10V
  • channel leakage of ±10 pA (typ.) at VDD − VEE = 10V
  • Logic level conversion for digital addressing signals of3 – 15V (VDD − VSS = 3 – 15V) to switch analog signals to 15 Vp-p (VDD − VEE = 15V)
  • 3 – 15V (VDD − VSS = 3 – 15V) to switch analog signals to 15 Vp-p (VDD − VEE = 15V)
  • Matched switch characteristics:∆RON = 5Ω (typ.) for VDD − VEE = 15V
  • ∆RON = 5Ω (typ.) for VDD − VEE = 15V
  • Very low quiescent power dissipation under all digital-control input and supply conditions:1 µ W (typ.) at VDD − VSS = VDD − VEE = 10V
  • 1 µ W (typ.) at VDD − VSS = VDD − VEE = 10V
  • Binary address decoding on chip

CD4052 pinout

CD4052 pinout diagram
PinNameDescription
10Y0Y Channel Output Of Multiplexer/Demultiplexer
22Y2Y Channel Output Of Multiplexer/Demultiplexer
3YY Channel Output Of Multiplexer/Demultiplexer
43Y3Y Channel Output Of Multiplexer/Demultiplexer
51Y1Y Channel Output Of Multiplexer/Demultiplexer
6INHInhibit input pin
7VEEEmitter Voltage
8VSSSupply Voltage
9BControl Pin B
10AControl Pin A
113x3x Channel Output Of Multiplexer/Demultiplexer
120x0x Channel Output Of Multiplexer/Demultiplexer
13xx Channel Output Of Multiplexer/Demultiplexer
141x1x Channel Output Of Multiplexer/Demultiplexer
152x2x Channel Output Of Multiplexer/Demultiplexer
16VDDDrain Voltage

Absolute maximum ratings

ParameterValue
DC Supply Voltage Range, (VDD)-0.5V to +20V (Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs-0.5V to VDD +0.5V
DC Input Current, Any One Input±10mA
Storage Temperature Range (TSTG)-65oC to +150oC
Lead Temperature (During Soldering)+265oC

CD4052 applications

  • Communication Syste
  • Telephone Network
  • Transmission from the Computer System of a Satellite
  • Communication System

CD4052 alternatives and equivalents

  • CD4051
  • CD4053

More about CD4052

CD4052 Features

  • Low “ON” resistance: 80Ω (typ.) over entire 15Vp-p
  • Logic level conversion for digital addressing signals of

Absolute Maximum Ratings

  • Power Dissipation (PD)
    • Dual-In-Line 700 mW
    • Small Outline 500 mW
  • Lead Temperature (During Soldering): +265oC
    • At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum

CD4052 Alternative Equivalent

CD4051, CD4053

CD4052 datasheet PDF preview

PDF · 142 KB

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